To offset the slowing of front-end-driven Moore’s Law and sustain the innovation trajectory that has fueled fifty-plus years of semiconductor industry growth, the development of advanced packaging is rapidly accelerating. As industry focus moves from front-end fab to post-fab integration, wafer probe is taking a prominent role in enabling a variety of advanced-packaging schemes like heterogenous integration of chiplets. This rise in prominence is being driven by two basic trends, one economic and one technical. On the economic front, surprisingly high pre-assembly chiplet yields are required for viable composite product yields, driving increased test fidelity and coverage. On the technical front, chiplet-to-chiplet interconnect structures are at least an order of magnitude denser than traditional flip-chip interconnect, driving a corresponding intensification in both probe pitch and probe count. As a consequence, advanced packaging is driving more probes, on more probe cards, with more challenging requirements for the wafer test community, pushing us into the spotlight previously occupied by our friends in the fab.