Pooya Tadayon, Ph.D.
Intel Fellow, Technology and Manufacturing Group
Director, Test Probe Technology
“Moore’s Law and the Future of Test”
Abstract
Moore’s Law has fueled the semiconductor industry for the last 50 years and as scaling has slowed down, attention is being shifted towards die disaggregation and heterogeneous integration. This in turn is driving the need for advanced packaging, which drives the need for a true known-good-die (tKGD) coming out of wafer test. Achieving a tKGD places significant challenges on the test platform and test tooling; these include, but are not limited to, thermal management, power delivery, mechanical state of the device, and test content. Addressing these challenges, in an economically viable way, is key to advancing Moore’s Law and will require a high degree of innovation from players across the industry to enable.
Biography
Dr. Pooya Tadayon is an Intel Fellow and the director of test probe technology in the Technology and Manufacturing Group at Intel Corporation. He is responsible for defining novel architectures, materials and processes for manufacturing Intel’s next-generation test interconnects. An expert in probing technology, Tadayon has specialized in the field since joining Intel in 1998 as a test integration engineer focused on sort and wafer probing technologies. In 2002, he was tapped to lead engineering for Intel’s test probe business, spending two years in that position. Starting in 2006, Tadayon became a test integration manager responsible for test flow optimization. In that role, he focused on innovative data system solutions to enable adaptive test techniques targeted at optimizing microprocessor yield and performance. Before assuming his current role in 2018, Tadayon served as director of test pathfinding. During his seven years in that role, he led the team charged with developing breakthrough test solutions for Intel’s next-generation products. Tadayon holds a bachelor’s degree in chemistry, biochemistry and biology from the University of Washington and a Ph.D. in physical chemistry from Oregon State University. In 2015, he earned an Intel Achievement Award, the company’s highest recognition, for his contributions to advancing test interconnect technology. He was appointed an Intel Fellow in 2018.